With the rapid development of semiconductor manufacturing technology, field-effect-transistors (FETs) have been developed toward a direction of having a higher component density and a higher integration level, and the gate size of planar transistors has also become smaller and smaller. As the size of traditional planar transistors is continuously reduced, the ability of traditional planar transistors in controlling the channel currents becomes weaker, resulting in the short-channel effect (SCE) and causing leakage currents, which ultimately affect the electrical performance of the FETs.
Gate-all-around (GAA) FETs can effectively suppress the SCE. In a GAA FET, the channel of the device is surrounded by the gate, which is conducive to improving the ability of the gate of the GAA FET in controlling the channel current. Therefore, the sub-threshold characteristics may be improved, and thus the SCE may be effectively suppressed. As such, the size of the transistor may be further reduced. In the meantime, the improvement of the sub-threshold characteristics may also be conducive to reducing the thickness of the gate dielectric, and thus reducing the gate leakage current.
However, as the density of GAA FETs increases and the size shrinks, the fabrication process for GAA FETs becomes more and more difficult, and the performance of the GAA FETs may be degraded and the reliability may decrease. For example, in order to improve the forward conductive characteristics of a GAA FET, the concentration of the doped ions in the source/drain doped regions may be increased, which may increase the risk of junction leakage, and thus degrade the electric performance and the stability of the GAA FET.
The disclosed GAA FET devices and fabrication methods thereof are directed to solve one or more problems set forth above and other problems in the art.